6502 Instruction set

The assembler recognizes the documented and undocumented NMOS 6502 instructions, and the simulator implements all 256 opcodes.

Address-mode notation

ADDRESS MODE	ASSEMBLY FORM
Immediate	#nn
Zero page	nn
Zero page, X / Y	nn,X / nn,Y
Absolute	nnnn
Absolute, X / Y	nnnn,X / nnnn,Y
Indexed indirect	(nn,X)
Indirect indexed	(nn),Y
Absolute indirect	(nnnn) (only JMP)
Relative	target (branches)
Implied	no operand

A +1 cycle applies to an indexed read that crosses a page boundary. Branches take 2 cycles when not taken, 3 when taken on the same page, and 4 when taken across a page.

Instructions

ADC

Adds memory and carry to A; affects A, N, V, Z, and C (and honors decimal mode).

Indexed reads take one additional cycle when indexing crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$69	2	2
Zero page	$65	2	3
Zero page, X	$75	2	4
Absolute	$6D	3	4
Absolute, X	$7D	3	4+1
Absolute, Y	$79	3	4+1
Indexed indirect	$61	2	6
Indirect indexed	$71	2	5+1

AND

ANDs memory with A; affects A, N, and Z.

Indexed reads take one additional cycle when indexing crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$29	2	2
Zero page	$25	2	3
Zero page, X	$35	2	4
Absolute	$2D	3	4
Absolute, X	$3D	3	4+1
Absolute, Y	$39	3	4+1
Indexed indirect	$21	2	6
Indirect indexed	$31	2	5+1

ASL

Shifts the operand left; affects the operand, N, Z, and C.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Accumulator	$0A	1	2
Zero page	$06	2	5
Zero page, X	$16	2	6
Absolute	$0E	3	6
Absolute, X	$1E	3	7

BCC

Branches when C=0; affects PC when taken.

Takes 2 cycles when not taken, 3 when taken on the same page, and 4 when the target crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Relative	$90	2	2/3/4

BCS

Branches when C=1; affects PC when taken.

Takes 2 cycles when not taken, 3 when taken on the same page, and 4 when the target crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Relative	$B0	2	2/3/4

BEQ

Branches when Z=1; affects PC when taken.

Takes 2 cycles when not taken, 3 when taken on the same page, and 4 when the target crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Relative	$F0	2	2/3/4

BIT

Tests A against memory; affects N, V, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$24	2	3
Absolute	$2C	3	4

BMI

Branches when N=1; affects PC when taken.

Takes 2 cycles when not taken, 3 when taken on the same page, and 4 when the target crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Relative	$30	2	2/3/4

BNE

Branches when Z=0; affects PC when taken.

Takes 2 cycles when not taken, 3 when taken on the same page, and 4 when the target crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Relative	$D0	2	2/3/4

BPL

Branches when N=0; affects PC when taken.

Takes 2 cycles when not taken, 3 when taken on the same page, and 4 when the target crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Relative	$10	2	2/3/4

BRK

Simulator breakpoint: aborts the step; it does not execute the hardware interrupt sequence.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$00	1	not charged

BVC

Branches when V=0; affects PC when taken.

Takes 2 cycles when not taken, 3 when taken on the same page, and 4 when the target crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Relative	$50	2	2/3/4

BVS

Branches when V=1; affects PC when taken.

Takes 2 cycles when not taken, 3 when taken on the same page, and 4 when the target crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Relative	$70	2	2/3/4

CLC

Clears C.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$18	1	2

CLD

Clears D.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$D8	1	2

CLI

Clears I.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$58	1	2

CLV

Clears V.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$B8	1	2

CMP

Compares A with memory; affects N, Z, and C.

Indexed reads take one additional cycle when indexing crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$C9	2	2
Zero page	$C5	2	3
Zero page, X	$D5	2	4
Absolute	$CD	3	4
Absolute, X	$DD	3	4+1
Absolute, Y	$D9	3	4+1
Indexed indirect	$C1	2	6
Indirect indexed	$D1	2	5+1

CPX

Compares X with memory; affects N, Z, and C.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$E0	2	2
Zero page	$E4	2	3
Absolute	$EC	3	4

CPY

Compares Y with memory; affects N, Z, and C.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$C0	2	2
Zero page	$C4	2	3
Absolute	$CC	3	4

DEC

Decrements memory; affects memory, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$C6	2	5
Zero page, X	$D6	2	6
Absolute	$CE	3	6
Absolute, X	$DE	3	7

DEX

Decrements X; affects X, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$CA	1	2

DEY

Decrements Y; affects Y, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$88	1	2

EOR

Exclusive-ORs memory with A; affects A, N, and Z.

Indexed reads take one additional cycle when indexing crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$49	2	2
Zero page	$45	2	3
Zero page, X	$55	2	4
Absolute	$4D	3	4
Absolute, X	$5D	3	4+1
Absolute, Y	$59	3	4+1
Indexed indirect	$41	2	6
Indirect indexed	$51	2	5+1

INC

Increments memory; affects memory, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$E6	2	5
Zero page, X	$F6	2	6
Absolute	$EE	3	6
Absolute, X	$FE	3	7

INX

Increments X; affects X, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$E8	1	2

INY

Increments Y; affects Y, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$C8	1	2

JMP

Sets PC. The indirect form emulates the 6502 page-wrap bug.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Absolute	$4C	3	3
Absolute indirect	$6C	3	5

JSR

Pushes PC+2 and sets PC to the target.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Absolute	$20	3	6

LDA

Loads A from memory; affects A, N, and Z.

Indexed reads take one additional cycle when indexing crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$A9	2	2
Zero page	$A5	2	3
Zero page, X	$B5	2	4
Absolute	$AD	3	4
Absolute, X	$BD	3	4+1
Absolute, Y	$B9	3	4+1
Indexed indirect	$A1	2	6
Indirect indexed	$B1	2	5+1

LDX

Loads X from memory; affects X, N, and Z.

Indexed reads take one additional cycle when indexing crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$A2	2	2
Zero page	$A6	2	3
Zero page, Y	$B6	2	4
Absolute	$AE	3	4
Absolute, Y	$BE	3	4+1

LDY

Loads Y from memory; affects Y, N, and Z.

Indexed reads take one additional cycle when indexing crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$A0	2	2
Zero page	$A4	2	3
Zero page, X	$B4	2	4
Absolute	$AC	3	4
Absolute, X	$BC	3	4+1

LSR

Shifts the operand right; affects the operand, N, Z, and C.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Accumulator	$4A	1	2
Zero page	$46	2	5
Zero page, X	$56	2	6
Absolute	$4E	3	6
Absolute, X	$5E	3	7

NOP

Does not affect registers, memory, or flags.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$EA	1	2

ORA

ORs memory with A; affects A, N, and Z.

Indexed reads take one additional cycle when indexing crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$09	2	2
Zero page	$05	2	3
Zero page, X	$15	2	4
Absolute	$0D	3	4
Absolute, X	$1D	3	4+1
Absolute, Y	$19	3	4+1
Indexed indirect	$01	2	6
Indirect indexed	$11	2	5+1

PHA

Pushes A.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$48	1	3

PHP

Pushes P with break and unused bits set.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$08	1	3

PLA

Pulls A; affects A, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$68	1	4

PLP

Pulls P.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$28	1	4

ROL

Rotates the operand left through carry; affects the operand, N, Z, and C.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Accumulator	$2A	1	2
Zero page	$26	2	5
Zero page, X	$36	2	6
Absolute	$2E	3	6
Absolute, X	$3E	3	7

ROR

Rotates the operand right through carry; affects the operand, N, Z, and C.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Accumulator	$6A	1	2
Zero page	$66	2	5
Zero page, X	$76	2	6
Absolute	$6E	3	6
Absolute, X	$7E	3	7

RTI

Pulls P, then PC, from the stack.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$40	1	6

RTS

Pulls a return address and sets PC to that address plus one.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$60	1	6

SBC

Subtracts memory and borrow from A; affects A, N, V, Z, and C (and honors decimal mode).

Indexed reads take one additional cycle when indexing crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$E9	2	2
Zero page	$E5	2	3
Zero page, X	$F5	2	4
Absolute	$ED	3	4
Absolute, X	$FD	3	4+1
Absolute, Y	$F9	3	4+1
Indexed indirect	$E1	2	6
Indirect indexed	$F1	2	5+1

SEC

Sets C.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$38	1	2

SED

Sets D.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$F8	1	2

SEI

Sets I.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$78	1	2

STA

Stores A to memory; affects memory only.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$85	2	3
Zero page, X	$95	2	4
Absolute	$8D	3	4
Absolute, X	$9D	3	5
Absolute, Y	$99	3	5
Indexed indirect	$81	2	6
Indirect indexed	$91	2	6

STX

Stores X to memory; affects memory only.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$86	2	3
Zero page, Y	$96	2	4
Absolute	$8E	3	4

STY

Stores Y to memory; affects memory only.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$84	2	3
Zero page, X	$94	2	4
Absolute	$8C	3	4

TAX

Copies A to X; affects X, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$AA	1	2

TAY

Copies A to Y; affects Y, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$A8	1	2

TSX

Copies SP to X; affects X, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$BA	1	2

TXA

Copies X to A; affects A, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$8A	1	2

TXS

Copies X to SP; affects SP only.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$9A	1	2

TYA

Copies Y to A; affects A, N, and Z.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$98	1	2

Undocumented instructions

The instructions below are undocumented and are a consequence of properties of the NMOS process used in the MOS 6502. These properties make most opcodes effectively stable, however, two of them: ANE and LAX are affected by a “magic constant”. Monster uses $ee for this constant (for simulation purposes). But in reality it may vary even during the execution of your program. Use these instructions with caution.

ALR

ANDs the immediate operand with A, then shifts the result right; affects A, N, Z, and C. N is always cleared, and C receives bit 0 of the value before the shift. Also known as ASR.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$4B	2	2

ANC

ANDs the immediate operand with A, then copies N to C; affects A, N, Z, and C. Also known as ANC2, ANA, or ANB.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$0B, $2B	2	2

ANE

Computes A = (A OR $EE) AND X AND operand; affects A, N, and Z. The $EE magic constant makes the simulator deterministic; the result can vary between physical processors and operating conditions. Also known as XAA.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$8B	2	2

ARR

ANDs the immediate operand with A, then rotates the result right through carry; affects A, N, V, Z, and C. C receives bit 7 of the value before the rotate, while V receives that value’s bit 7 XOR bit 6. Decimal-mode behavior is not modeled.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$6B	2	2

DCP

Decrements memory, then compares the result with A; affects memory, N, Z, and C. Also known as DCM.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$C7	2	5
Zero page, X	$D7	2	6
Absolute	$CF	3	6
Absolute, X	$DF	3	7
Absolute, Y	$DB	3	7
Indexed indirect	$C3	2	8
Indirect indexed	$D3	2	8

ISC

Increments memory, then subtracts it and the borrow from A; affects memory, A, N, V, Z, and C, and honors decimal mode. Also known as ISB or INS.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$E7	2	5
Zero page, X	$F7	2	6
Absolute	$EF	3	6
Absolute, X	$FF	3	7
Absolute, Y	$FB	3	7
Indexed indirect	$E3	2	8
Indirect indexed	$F3	2	8

JAM

Stops the simulated processor. The debugger reports a jam and aborts the step; the instruction is not charged any cycles. Also known as KIL or HLT.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$02, $12, $22, $32, $42, $52, $62, $72, $92, $B2, $D2, $F2	1	not charged

LAS

ANDs memory with SP, then copies the result to A, X, and SP; affects A, X, SP, N, and Z. Also known as LAR.

Indexed reads take one additional cycle when indexing crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Absolute, Y	$BB	3	4+1

LAX

Loads the same value into A and X; affects A, X, N, and Z.

The immediate form computes A = X = (A OR $EE) AND operand. Its $EE magic constant makes the simulator deterministic; the result can vary between physical processors and operating conditions. The indexed memory reads take one additional cycle when indexing crosses a page boundary. The immediate form is also known as LXA, OAL, or ATX.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$AB	2	2
Zero page	$A7	2	3
Zero page, Y	$B7	2	4
Absolute	$AF	3	4
Absolute, Y	$BF	3	4+1
Indexed indirect	$A3	2	6
Indirect indexed	$B3	2	5+1

NOP (undocumented forms)

Does not affect registers, memory, or flags. The immediate forms consume their operand byte. The memory-addressed forms perform a real read, so they can trigger read side effects and debugger watches. Absolute-X reads take one additional cycle when indexing crosses a page boundary.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Implied	$1A, $3A, $5A, $7A, $DA, $FA	1	2
Immediate	$80, $82, $89, $C2, $E2	2	2
Zero page	$04, $44, $64	2	3
Zero page, X	$14, $34, $54, $74, $D4, $F4	2	4
Absolute	$0C	3	4
Absolute, X	$1C, $3C, $5C, $7C, $DC, $FC	3	4+1

RLA

Rotates memory left through carry, then ANDs the result with A; affects memory, A, N, Z, and C. Also known as RLN.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$27	2	5
Zero page, X	$37	2	6
Absolute	$2F	3	6
Absolute, X	$3F	3	7
Absolute, Y	$3B	3	7
Indexed indirect	$23	2	8
Indirect indexed	$33	2	8

RRA

Rotates memory right through carry, then adds the result and the rotate’s carry to A; affects memory, A, N, V, Z, and C, and honors decimal mode. Also known as RRD.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$67	2	5
Zero page, X	$77	2	6
Absolute	$6F	3	6
Absolute, X	$7F	3	7
Absolute, Y	$7B	3	7
Indexed indirect	$63	2	8
Indirect indexed	$73	2	8

SAX

Stores A AND X in memory; affects memory only. Also known as AXS or AAX.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$87	2	3
Zero page, Y	$97	2	4
Absolute	$8F	3	4
Indexed indirect	$83	2	6

SBC (alternate opcode)

Opcode $EB behaves identically to the documented immediate SBC opcode.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$EB	2	2

SBX

Computes X = (A AND X) - operand; affects X, N, Z, and C. The flags are set as for CMP: the subtraction ignores carry and decimal mode and does not affect V. Also known as AXS or XMA.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Immediate	$CB	2	2

SHA

Stores A AND X AND (H + 1), where H is the high byte of the unindexed target address; affects memory only. If indexing crosses a page, the high byte of the address written is also replaced with (H + 1) AND value. Also known as AHX.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Absolute, Y	$9F	3	5
Indirect indexed	$93	2	6

SHX

Stores X AND (H + 1), where H is the high byte of the unindexed target address; affects memory only. If indexing crosses a page, the high byte of the address written is also replaced with (H + 1) AND value. Also known as SXA.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Absolute, Y	$9E	3	5

SHY

Stores Y AND (H + 1), where H is the high byte of the unindexed target address; affects memory only. If indexing crosses a page, the high byte of the address written is also replaced with (H + 1) AND value. Also known as SYA.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Absolute, X	$9C	3	5

SLO

Shifts memory left, then ORs the result into A; affects memory, A, N, Z, and C. Also known as ASO.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$07	2	5
Zero page, X	$17	2	6
Absolute	$0F	3	6
Absolute, X	$1F	3	7
Absolute, Y	$1B	3	7
Indexed indirect	$03	2	8
Indirect indexed	$13	2	8

SRE

Shifts memory right, then exclusive-ORs the result into A; affects memory, A, N, Z, and C. Also known as LSE.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Zero page	$47	2	5
Zero page, X	$57	2	6
Absolute	$4F	3	6
Absolute, X	$5F	3	7
Absolute, Y	$5B	3	7
Indexed indirect	$43	2	8
Indirect indexed	$53	2	8

TAS

Copies A AND X to SP, then stores SP AND (H + 1), where H is the high byte of the unindexed target address; affects SP and memory. If indexing crosses a page, the high byte of the address written is also replaced with (H + 1) AND value. Also known as SHS.

ADDRESS MODE	OPCODE	SIZE	CYCLES
Absolute, Y	$9B	3	5